Substrate Noise Generation in Complex Digital Circuits
نویسندگان
چکیده
Introduction This work intends to develop new methodologies to evaluate efficiently and early in the design process the substrate noise injected by large digital circuits. Nowadays it is possible to build circuital substrate models, which along with the models produced by the traditional extraction tools for the active circuitry can produce a very accurate substrate aware model. Unfortunately these models at transistor level are useless in circuits with thousand of gates due to the unfeasible simulation time required to test the circuit even with a reduced set of input vectors. Several different effects can produce substrate noise when gates are switching [3] but only three appear to be relevant [6, 7]:
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